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   <div id="projectname">DM-CtrlH7-BF-DevProgram<span id="projectnumber">&#160;beta 0.1</span>
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<div class="header">
  <div class="headertitle"><div class="title">RCC MCOx Clock Prescaler <div class="ingroups"><a class="el" href="group___s_t_m32_h7xx___h_a_l___driver.html">STM32H7xx_HAL_Driver</a> &raquo; <a class="el" href="group___r_c_c.html">RCC</a> &raquo; <a class="el" href="group___r_c_c___exported___constants.html">RCC Exported Constants</a></div></div></div>
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<tr class="heading"><td colspan="2"><h2 id="header-define-members" class="groupheader"><a id="define-members" name="define-members"></a>
Macros</h2></td></tr>
<tr class="memitem:ga438d8c3bead4e1ec5dd5757cb0313d53" id="r_ga438d8c3bead4e1ec5dd5757cb0313d53"><td class="memItemLeft" align="right" valign="top"><a id="ga438d8c3bead4e1ec5dd5757cb0313d53" name="ga438d8c3bead4e1ec5dd5757cb0313d53"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_MCODIV_1</b>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gac8007a9d6ee3fd88912aaf290746ae0e">RCC_CFGR_MCO1PRE_0</a></td></tr>
<tr class="memitem:ga6198330847077f4da351915518140bfc" id="r_ga6198330847077f4da351915518140bfc"><td class="memItemLeft" align="right" valign="top"><a id="ga6198330847077f4da351915518140bfc" name="ga6198330847077f4da351915518140bfc"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_MCODIV_2</b>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gaaf7c1280f61d56b4897f9c876987e092">RCC_CFGR_MCO1PRE_1</a></td></tr>
<tr class="memitem:gab9dac03733c3c5bd8877ef43bff3d5f4" id="r_gab9dac03733c3c5bd8877ef43bff3d5f4"><td class="memItemLeft" align="right" valign="top"><a id="gab9dac03733c3c5bd8877ef43bff3d5f4" name="gab9dac03733c3c5bd8877ef43bff3d5f4"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_MCODIV_3</b>&#160;&#160;&#160;((uint32_t)<a class="el" href="group___peripheral___registers___bits___definition.html#gac8007a9d6ee3fd88912aaf290746ae0e">RCC_CFGR_MCO1PRE_0</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#gaaf7c1280f61d56b4897f9c876987e092">RCC_CFGR_MCO1PRE_1</a>)</td></tr>
<tr class="memitem:ga1bdc2eb56aaeb53dc3ca5cd72f22d4c8" id="r_ga1bdc2eb56aaeb53dc3ca5cd72f22d4c8"><td class="memItemLeft" align="right" valign="top"><a id="ga1bdc2eb56aaeb53dc3ca5cd72f22d4c8" name="ga1bdc2eb56aaeb53dc3ca5cd72f22d4c8"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_MCODIV_4</b>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga11e1d10d1b55e0d88d24212ea2c8ba6e">RCC_CFGR_MCO1PRE_2</a></td></tr>
<tr class="memitem:ga67292dd05ceb8189ec439d4ac4d58b88" id="r_ga67292dd05ceb8189ec439d4ac4d58b88"><td class="memItemLeft" align="right" valign="top"><a id="ga67292dd05ceb8189ec439d4ac4d58b88" name="ga67292dd05ceb8189ec439d4ac4d58b88"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_MCODIV_5</b>&#160;&#160;&#160;((uint32_t)<a class="el" href="group___peripheral___registers___bits___definition.html#gac8007a9d6ee3fd88912aaf290746ae0e">RCC_CFGR_MCO1PRE_0</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#ga11e1d10d1b55e0d88d24212ea2c8ba6e">RCC_CFGR_MCO1PRE_2</a>)</td></tr>
<tr class="memitem:ga0229b0d7e7444342b5966d4096d61b1b" id="r_ga0229b0d7e7444342b5966d4096d61b1b"><td class="memItemLeft" align="right" valign="top"><a id="ga0229b0d7e7444342b5966d4096d61b1b" name="ga0229b0d7e7444342b5966d4096d61b1b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_MCODIV_6</b>&#160;&#160;&#160;((uint32_t)<a class="el" href="group___peripheral___registers___bits___definition.html#gaaf7c1280f61d56b4897f9c876987e092">RCC_CFGR_MCO1PRE_1</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#ga11e1d10d1b55e0d88d24212ea2c8ba6e">RCC_CFGR_MCO1PRE_2</a>)</td></tr>
<tr class="memitem:gad32c07babb81067c9243e81cc02d6f5d" id="r_gad32c07babb81067c9243e81cc02d6f5d"><td class="memItemLeft" align="right" valign="top"><a id="gad32c07babb81067c9243e81cc02d6f5d" name="gad32c07babb81067c9243e81cc02d6f5d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_MCODIV_7</b>&#160;&#160;&#160;((uint32_t)<a class="el" href="group___peripheral___registers___bits___definition.html#gac8007a9d6ee3fd88912aaf290746ae0e">RCC_CFGR_MCO1PRE_0</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#gaaf7c1280f61d56b4897f9c876987e092">RCC_CFGR_MCO1PRE_1</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#ga11e1d10d1b55e0d88d24212ea2c8ba6e">RCC_CFGR_MCO1PRE_2</a>)</td></tr>
<tr class="memitem:gadb84d9a10db2c49376be8fada619fe08" id="r_gadb84d9a10db2c49376be8fada619fe08"><td class="memItemLeft" align="right" valign="top"><a id="gadb84d9a10db2c49376be8fada619fe08" name="gadb84d9a10db2c49376be8fada619fe08"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_MCODIV_8</b>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gad8ebcaff127fd7a89e83e450cca28e4d">RCC_CFGR_MCO1PRE_3</a></td></tr>
<tr class="memitem:ga0e12a28a4762fd6d7826a8349b44f0f6" id="r_ga0e12a28a4762fd6d7826a8349b44f0f6"><td class="memItemLeft" align="right" valign="top"><a id="ga0e12a28a4762fd6d7826a8349b44f0f6" name="ga0e12a28a4762fd6d7826a8349b44f0f6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_MCODIV_9</b>&#160;&#160;&#160;((uint32_t)<a class="el" href="group___peripheral___registers___bits___definition.html#gac8007a9d6ee3fd88912aaf290746ae0e">RCC_CFGR_MCO1PRE_0</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#gad8ebcaff127fd7a89e83e450cca28e4d">RCC_CFGR_MCO1PRE_3</a>)</td></tr>
<tr class="memitem:ga160aca969815d45c15c0aaa3e84f7a53" id="r_ga160aca969815d45c15c0aaa3e84f7a53"><td class="memItemLeft" align="right" valign="top"><a id="ga160aca969815d45c15c0aaa3e84f7a53" name="ga160aca969815d45c15c0aaa3e84f7a53"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_MCODIV_10</b>&#160;&#160;&#160;((uint32_t)<a class="el" href="group___peripheral___registers___bits___definition.html#gaaf7c1280f61d56b4897f9c876987e092">RCC_CFGR_MCO1PRE_1</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#gad8ebcaff127fd7a89e83e450cca28e4d">RCC_CFGR_MCO1PRE_3</a>)</td></tr>
<tr class="memitem:ga18c9fea34a100746a2ad7fc117bc2036" id="r_ga18c9fea34a100746a2ad7fc117bc2036"><td class="memItemLeft" align="right" valign="top"><a id="ga18c9fea34a100746a2ad7fc117bc2036" name="ga18c9fea34a100746a2ad7fc117bc2036"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_MCODIV_11</b>&#160;&#160;&#160;((uint32_t)<a class="el" href="group___peripheral___registers___bits___definition.html#gac8007a9d6ee3fd88912aaf290746ae0e">RCC_CFGR_MCO1PRE_0</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#gaaf7c1280f61d56b4897f9c876987e092">RCC_CFGR_MCO1PRE_1</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#gad8ebcaff127fd7a89e83e450cca28e4d">RCC_CFGR_MCO1PRE_3</a>)</td></tr>
<tr class="memitem:ga0e15b47a23cc0f7b31a737736d64bb3f" id="r_ga0e15b47a23cc0f7b31a737736d64bb3f"><td class="memItemLeft" align="right" valign="top"><a id="ga0e15b47a23cc0f7b31a737736d64bb3f" name="ga0e15b47a23cc0f7b31a737736d64bb3f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_MCODIV_12</b>&#160;&#160;&#160;((uint32_t)<a class="el" href="group___peripheral___registers___bits___definition.html#ga11e1d10d1b55e0d88d24212ea2c8ba6e">RCC_CFGR_MCO1PRE_2</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#gad8ebcaff127fd7a89e83e450cca28e4d">RCC_CFGR_MCO1PRE_3</a>)</td></tr>
<tr class="memitem:ga7b99a9858094aa608be6bfefed3b701e" id="r_ga7b99a9858094aa608be6bfefed3b701e"><td class="memItemLeft" align="right" valign="top"><a id="ga7b99a9858094aa608be6bfefed3b701e" name="ga7b99a9858094aa608be6bfefed3b701e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_MCODIV_13</b>&#160;&#160;&#160;((uint32_t)<a class="el" href="group___peripheral___registers___bits___definition.html#gac8007a9d6ee3fd88912aaf290746ae0e">RCC_CFGR_MCO1PRE_0</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#ga11e1d10d1b55e0d88d24212ea2c8ba6e">RCC_CFGR_MCO1PRE_2</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#gad8ebcaff127fd7a89e83e450cca28e4d">RCC_CFGR_MCO1PRE_3</a>)</td></tr>
<tr class="memitem:ga539f249e2ac961eb38327b74fceea5d7" id="r_ga539f249e2ac961eb38327b74fceea5d7"><td class="memItemLeft" align="right" valign="top"><a id="ga539f249e2ac961eb38327b74fceea5d7" name="ga539f249e2ac961eb38327b74fceea5d7"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_MCODIV_14</b>&#160;&#160;&#160;((uint32_t)<a class="el" href="group___peripheral___registers___bits___definition.html#gaaf7c1280f61d56b4897f9c876987e092">RCC_CFGR_MCO1PRE_1</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#ga11e1d10d1b55e0d88d24212ea2c8ba6e">RCC_CFGR_MCO1PRE_2</a> | <a class="el" href="group___peripheral___registers___bits___definition.html#gad8ebcaff127fd7a89e83e450cca28e4d">RCC_CFGR_MCO1PRE_3</a>)</td></tr>
<tr class="memitem:gaecc7121d3dffe60e59e490c809dd8ad0" id="r_gaecc7121d3dffe60e59e490c809dd8ad0"><td class="memItemLeft" align="right" valign="top"><a id="gaecc7121d3dffe60e59e490c809dd8ad0" name="gaecc7121d3dffe60e59e490c809dd8ad0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_MCODIV_15</b>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga23171ca70972a106109a6e0804385ec5">RCC_CFGR_MCO1PRE</a></td></tr>
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